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02013-DSH-001-G mindspeed technologies ? october 2007 mindspeed proprietary and confidential m02013 cmos transimpedance amplifier with agc for fiber-optic networks up to 3.2 gbps applications ? atm/sdh/sonet ? 2x/4x fiber channel the m02013 is a transimpedance amplifier (tia) with agc manufactured in a sub-micron, cmos process. the agc allows more than 25 db of dynamic range, providing a low-cost solution for longer-reach 3.2 gbps atm/ sonet systems. for optimum system performance, the m02013 die should be moun ted with a silicon or in gaas pin photodetector inside a lensed to-can or other optical sub-assembly. the m02013 can either bias the pin diode from the internal regulator or use an externally biased pin diode. a replica of the average photodiode current is available at the mon pad for photo-alignment and receive power monitoring (sff-8472 compliant). typical applications diagram pina dout doutb v cc pink 1 nf m02013 470 pf rm mon v cc gnd tia bond pad to can lead ac-coupled to limiting amplifier limiting amplifier features ? typical -23 dbm sensitivit y, +3 dbm saturation at 3.2 gbps (-24 dbm at 2.5 gbps) when used with 0.9 a/w ingaas pin. (cpd 0.5 pf ber 10 -10 ) ? typical differential transimpedance: 10 k ? fabricated in standard cmos ? differential output ? operates with standard +3.3 volt supply ? available as die only ? monitor output ? agc provides dynamic range of more than 25 db ? internal or external bias for photodiode ? pin or apd sensor ? same pad layout and die size as m02011/14/15/16
02013-DSH-001-G mindspeed technologies ? ii mindspeed proprietary and confidential ordering information part number package operating temperature m02013-xx* waffle pack ?40 c to 85 c m02013-xx* expanded whole wafer on a ring ?40 c to 85 c note: *xx represents the revision number. please contact your local sales office for correct digits. revision history revision level date description g release october 2007 updated ?typical applications diagram? on the front page to show imon connection. corrected imon configuration in figure 4-1 . corrected pink connection in the ?alternative circuit? in figure 4-1 . f release september 2007 corrected pina absolute maximum voltage in table 1-1 . added specifications for imon in section 1.4 . added imon typical performance graph in figure 1-4 . updated imon pin description in section 2.1 . updated imon functional description in section 3.2.4 . added applications information for imon calibration in section 4.4 . e release june 2007 revised table 1-1 . separate applications information fr om functional description. add notes to clarify the bonding procedure. correct bond pad coordinates (x and y values transposed). typical eye diagram eye diagram for 3.2 gbps at -20 dbm input signal pad configuration mon pina pink v cc agc dout gnd gnd doutgnd 1 2 3 4 56 7 8 9 10 11 12 v cc dout doutgnd die size 1090 x 880 m
02013-DSH-001-G mindspeed technologies ? 1 mindspeed proprietary and confidential 1.0 product specification 1.1 absolute maximum ratings these are the absolute maximum ratings at or beyond which the ic can be expected to fail or be damaged. reliable operation at these extremes for any length of time is not implied. 1.2 recommended operating conditions table 1-1. absolute maximum ratings symbol parameter rating units v cc power supply (v cc - gnd) -0.4 to +4.0 v t stg storage temperature -65 to +150 c i in pina input current 8.0 (1, 2) ma pp v pina, v agc maximum input voltage at pina and agc -0.4 to +2.0 (2) v i pink maximum average current sourced out of pink 10.0 ma v pink , v mon maximum input voltage at pink and mon -0.4 to vcc +0.4 v i dout maximum average current sourced out of dout and doutb 10.0 (3) ma v dout maximum input voltage at d out and doutb 0.0 to +2.0 (3) v notes: 1. equivalent to 4.9 ma average current. 2. do not exceed either the i in or v pina rating. pina damage will result in performa nce degradation which is difficult to detect. 3. do not exceed either the i dout or v dout rating. output device damage could occur. table 1-2. recommended operating conditions symbol parameter rating units v cc power supply (v cc ? gnd) 3.3 10% v c pd max. photodiode capacitance (v r = 1.8 v, when using pink), for 3.2 gbps data rate 0.5 pf t a operating ambient temperature ?40 to +85 c
product specification 02013-DSH-001-G mindspeed technologies ? 2 mindspeed proprietary and confidential 1.3 dc characteristics 1.4 ac characteristics table 1-3. dc characteristics symbol parameter minimum typical maximum units v b photodiode bias voltage (pink ? pina) 1.6 1.8 2.0 v v cm common mode output voltage 0.7 1 1.3 v v ol and v oh output voltage swing 0.45 1 1.55 v i cc supply current (no loads) 31 42 58 ma r load recommended differential output loading 85 100 (1) ? note: 1. 100 is the load presented by the input of the limiting amplifier. table 1-4. ac characteristics symbol parameter condition min. typ. (1) max. units r out output impedance (2) single ended 25 40 60 lfc low frequency cutoff (3) ?5080 khz v d differential output voltage 100 differential load ? 275 500 mv dcd duty cycle distortion 3.2 gbps ? ? 20 ps dj deterministic jitter (includes dcd) 3.2 gbps, 2 23 - 1 prbs ? ? 35 ps pp in_rms total input rms noise dc to 2.3 ghz, cin = 0.5 pf ? 475 600 na pin example dynamic range of optical input (4) -22 ? +3 dbm pin (mean), min minimum optical sensitivity (4) 3.2 gbps ? -23 ? dbm 2.5 gbps ? -24 ? imon_off monitor output offset (5) v mon = 1v to v cc ? ? 4.0 a imon_error monitor output accuracy (6) 4.5a i_in_avg 1.2ma v mon = 1v to v cc ? ? 2.5 db notes: 1. die designed to operate over an ambient temperature range of ?40 c to +85 c, t a and v cc range from 3.0 - 3.6v. typical values are tested at t a = 25 c and v cc = 3.3v. 2. measured at 1 mhz. 3. input ?22 dbm, extinction ratio = 10, temp = 25 c. 4. at stated data rate, ber 10 ?10 , pd capacitance = 0.5 pf, responsivity 0.9 a/w, extinction ratio = 10. 5. see applications information ( section 4.4 ) for recommended offset calibration. 6. after offset removed, extinction ratio 20 db.
product specification 02013-DSH-001-G mindspeed technologies ? 3 mindspeed proprietary and confidential 1.5 dynamic characteristics 1.6 typical performance vcc = 3.3v, temperature = 25 c, lin = 1 nh, unless otherwise stated, tia gain is differential. table 1-5. dynamic characteristics symbol parameter minimum typical maximum units g transimpedance - single ended - differential 3.5 7 5 10 7 14 k bw bandwidth to -3 db point @ -22 dbm, 0.9a/w, 0.5 pf pd 2.0 2.4 ? ghz rc agc loop time constant ? 2 ? s i agc agc threshold 30 ? ? a pp i ovl maximum functional input current 3.6 (1) ??ma psrr power supply rejection, f < 4 mhz 20 28 ? db note: 1. equivalent to +3.4 dbm input optical power at extinction ratio = 10, responsivity = 1.0 a/w. figure 1-1. typical performance diagrams 1 of 4 transimpedance vs iin 100 1000 10000 100000 1 10 100 1000 input current (ua p-p) transimpedance (ohms)
product specification 02013-DSH-001-G mindspeed technologies ? 4 mindspeed proprietary and confidential vcc = 3.3v, temperature = 25 c , lin = 1 nh, unless otherwise stated, tia gain is differential. figure 1-2. typical performance diagrams 2 of 4 bandwidth vs. tem perature 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 -4010 60110 junction tem perature (oc) bandwidth (ghz) cin = 0.3pf cin = 0.5pf cin = 0.85pf cin = 1.0pf transimpedance vs. v agc 1 10 100 1000 10000 100000 00.5 11.5 2 v agc (v) transimpedance (ohms) bandwidth vs. input capacitance 1 1.5 2 2.5 3 0.3 0.7 1.1 1.5 c in (pf) bandwidth (ghz) t = -40 o c t = 0o c t = 27o c t = 85o c t = 110o c
product specification 02013-DSH-001-G mindspeed technologies ? 5 mindspeed proprietary and confidential vcc = 3.3v, temperature = 25 c , lin = 1 nh, unless otherwise stated, tia gain is differential. figure 1-3. typical performance diagrams 3 of 4 fre que ncy re sponse c in = 0.7pf 3200 5200 7200 9200 100 1000 10000 fr eque ncy (mhz ) t ran sim p ed an ce (ohms) monitor current vs. average input current 1 10 100 1000 10000 1 10 100 1000 10000 average input current (a) monitor current (a) input-referred noise vs. temperature 420 440 460 480 500 -40 10 60 110 junction temperature (oc) input noise (na rms ) cin = 1. 0pf cin = 0.85pf cin = 0. 5pf cin = 0. 3pf
product specification 02013-DSH-001-G mindspeed technologies ? 6 mindspeed proprietary and confidential vcc = 3.3v, temperature = 25 c , lin = 1 nh, unless otherwise stated, tia gain is differential. figure 1-4. typical performance diagrams 3 of 3 deterministic jitter vs iin 0 5 10 15 20 0.001 0.01 0.1 1 10 input current (ma) jitter (ps p-p) i cc vs. temperature 40 41 42 43 44 -40 10 60 110 junctio n te m perature (oc) i cc (ma) v cc = 3.6v v cc = 3.3v v cc = 3.0v typical imon error range vs. input power with ac signal applied (after offset calibration) -3 -2 -1 0 1 2 3 -23 -18 -13 -8 -3 1.5 average input power (dbm) imon error (db)
02013-DSH-001-G mindspeed technologies ? 7 mindspeed proprietary and confidential 2.0 pin/pad definitions 2.1 pin/pad definitions table 2-1. pin/pad definitions die pad no name function 1 agc monitor or force agc voltage 2v cc power pin. connect to most positive supply 3 pink common pin input. connect photo diode cath ode here and a 470 pf capacitor to gnd (1) 4 pina active pin input. connect to photo diode anode 5v cc power pin. connect to most positive supply (only one v cc pad needs to be connected) 6 mon analog current sink output. current matched to average photodiode current 7dout differential data output (goes low as light increases) 8dout gnd ground return for dout pad (all gnd pads must be connected) 9 gnd ground pin. connect to the most negative supply (2) 10 gnd ground pin. connect to the most negative supply (2) 11 doutgnd ground return for dout pad (2) 12 dout differential data outp ut (goes high as light increases) na backside backside. connect to the lowest potential, usually ground notes: 1. alternatively the photodiode cathode may be conn ected to a decoupled positive supply, e.g. v cc . 2. all ground pads are common on the die. only one ground pad needs to be connected to the to-can ground. however, connecting mo re than one ground pad to the to-can ground, particularly those across the di e from each other can improve performance in noisy environment s. figure 2-1. bare die layout mon pina pink v cc agc dout gnd gnd doutgnd 1 2 3 4 56 7 8 9 10 11 12 v cc dout doutgnd
02013-DSH-001-G mindspeed technologies ? 8 mindspeed proprietary and confidential 3.0 functional description 3.1 overview the m02013 is a transimpedance amplifier (tia) with agc manufactured in a sub-micron, cmos process. the agc allows more than 25 dbm of dynamic range, providing a low-cost solution for longer-reach 3.2 gbps atm/ sonet systems. for optimum system performance, the m02013 die should be moun ted with a silicon or in gaas pin photodetector inside a lensed to-can or other optical sub-assembly. he m02013 can either bias the pin diode from the internal regulator or use an externally biased pin diode. a replica of the average photodiode current is available at the mon pad for photo-alignment and 'loss of signal' (los) monitoring. figure 3-1. m02013 block diagram dc restore phase splitter b.i.s.t. en agc pina pink mon dout dout 2.6 v 1 v dc shift
functional description 02013-DSH-001-G mindspeed technologies ? 9 mindspeed proprietary and confidential 3.2 general description 3.2.1 tia (transimpedance amplifier) the transimpedance amplifier consists of a high gain single-ended cmos amplifier (tia), with a feedback resistor. the feedback creates a virtual earth low impedance at the input and virtually all of the input current passes through the feedback resistor, defining the voltage at the out put. advanced cmos design techniques are employed to maintain the stability of this st age across all input conditions. single-ended amplifiers have inherently poor power supply noise rejection. for this reason, an on-chip low dropout linear regulator has been incorporated into the design to give excellent noise rejection up to several mhz. higher frequency power supply noise is removed by the external 470 pf decoupling capacitor connected to pink. the circuit is designed for pin photodiodes in the ?grounded cathode? configuration, with the anode connected to the input of the tia and the cathode connected to ac ground, such as the provided pink terminal. reverse dc bias is applied to reduce the photodiode capacitance. avalanche photodiodes can be connected externally to a higher voltage. 3.2.2 agc the m02013 has been designed to operate over the input range of +3 dbm to -23 dbm @ 3.2 gbps and -24 dbm @ 2.5 gbps. this represents a ratio of 1:300, whereas the acceptable dynamic range of the output is only 1:30 which implies a compression of 10:1 in the transimpedanc e. the design uses a mos transistor operating as a ?voltage controlled resistor? to ac hieve the transimpedance variation. another feature of the agc is that it only operates on signals greater than ?17.5 dbm (@ 0.9 a/w). this knee in the gain response is important when setting ?signal detect? functions in the following post amplifier. it also aids in active photodiode alignment. the agc pad allows the agc to be disabled during photodiode alignment by grounding the pad through a low impedance. the agc control voltage can be monitored during normal operation at this pad by a high impedance (>10 m ) circuit. 3.2.3 output stage the signal from the tia enters a phase splitter followed by a dc-shift stage and a pair of voltage follower outputs. these are designed to drive a differential (100 ) load. they are stable for driving capacitive loads, such as interstage filters. each output has its own gnd pad, all four gnd pads on the chip should be connected for proper operation. since the m02013 exhibits rapid roll-off (3 pole), simple external filtering is sufficient. 3.2.4 monitor o/p high impedance output sinks a replica average photodiode current for photo-alignment and monitoring purposes. this output is compatible with the ddmi receive power specification (sff-8472) and mindspeed?s ddmi controller products. ensure that the voltage on v mon is in the range of 1v to v cc . refer to figure 4-1 .
02013-DSH-001-G mindspeed technologies ? 10 mindspeed proprietary and confidential 4.0 applications information 4.1 recommended pin diode connections figure 4-1. suggested pin diode connection methods recommended circuit pina dout doutb v cc pink 1 nf m02013 470 pf rm mon v cc gnd tia bond pad to can lead alternative circuit: external pd/apd bias pina dout doutb v cc pink 1 nf 500 470 pf m02013 pdc _bias rm mon v cc pdc gnd tia bond pad to can lead
applications information 02013-DSH-001-G mindspeed technologies ? 11 mindspeed proprietary and confidential 4.2 to-can layout 4.3 treatment of pink pink requires bypassing to ground with a capacitor when powering a photo diode. if pink is not used to bias the photo diode, then it is not necessary to bypass an unused pink. figure 4-2. typical layout diagram notes: typical application inside of a 5 lead to-can. only one of the v cc pads and one of the gnd pads need to be connected (though in noisy environments two or more gnd pads connected may improve performance). the backside must be connected to the lowest potential, usually ground, with conductive epoxy or a similar die attach material. if a monitor output is not required then a 4 lead to-can may be used. mon pina pink v cc agc do ut gnd gnd dout gnd v cc dout dout gnd v cc mon dout doutb 1nf 470pf
applications information 02013-DSH-001-G mindspeed technologies ? 12 mindspeed proprietary and confidential 4.4 monitor o/p calibration this output is compatible with the ddmi receive power specification (sff-8472) and mindspeed?s ddmi controller products. ensure that the voltage on v mon is in the range of 1v to v cc . refer to figure 4-1 . because the offset for the monitor output can be in either direction (+ or -), it is not possible to calibrate out the offset when there is not an input signal present. to properly calibrate the offset, a known input power between -23 dbm to -18 dbm should be used and the resulting monitor output compared with the expected output and the offset calibrated. for example, with a responsivity of 1.0, an input power of -20 dbm (equivalent to 10 w) should result in a monitor current of 10.0 a. the offset is found by subtracting the measured monitor current from the expected monitor current. this offset is then added (with its sign) to all subsequent monitor readings. in this case, if the monitor current was found to be 8.5 a, then the offset value to be used is (positive) 1.5a and all readings should be corrected by adding 1.5 a to the monitor value. however, if the reading was 10.7 a, then the offset is -0.7 a, and 0.7 a should be subtracted from all subsequent monitor readings. for the example above, if the responsivi ty is 0.90, then an input power of -20 dbm (still equivalent to 10 w) should result in a monitor current of 9.0 a (0.9 a/w x 10 w). again, if the measured current is 8.5 a, then the offset would be calculated as +0.5 a and all readings should be corrected by adding 0.5 a to the monitor value. if the measured current is 10.7 a, then the offset is -1.7 a and 1.7 a should be subtracted from all subsequent monitor readings.
applications information 02013-DSH-001-G mindspeed technologies ? 13 mindspeed proprietary and confidential 4.5 to-can assembly recommendations figure 4-3. to-can assembly diagram m02013 ceramic shim submount to can leads pin diode to-can header ceramic shim submount to can leads to-can header not recommended example recommended example metal shim @4 or 5 m02013 pin diode @4 or 5 this bond is too long and unreliable this bond is unreliable
applications information 02013-DSH-001-G mindspeed technologies ? 14 mindspeed proprietary and confidential 4.5.1 assembly the m02013 is designed to work with a wirebond inductance of 1 nh 0.25 nh. many existing to-can configurations will not allow wirebond lengths that short, since the pin di ode submount a nd the tia di e are more than 1 mm away in the vertical direction, due to the need to have the pin diode in the correct focal plane. this can be remedied by raising up the tia di e with a conductive metal shim. this will effectively reduce the bond wire length. refer to figure 4-3 for details. mindspeed recommends ball bonding with a 1 mil (25.4 m) gold wire. for performance reasons the pina pad is smaller than the others and also has less via material connected to it. it therefore requires more care in setting of the bonding parameters. for the same reason pina has no esd protection. in addition, please refer to the mindspeed product bulletin on recommended assembly procedures (document number 0201x-pbd-002-a). care must be taken when selecting chip capacitors, since they must have good low esr characteristics up to 1.0 ghz. it is also important that the termination materials of the capacitor be compatible with the attach method used. for example, tin/lead (pb/sn) solder finish capacitors are incompatible with silver-filled epoxies. palladium/silver (pd/ag) terminations are compat ible with silver filled epoxies. solder can be used only if the substrate thick-film inks are compatible with pb/sn solders. 4.5.2 recommended assembly procedures for esd protection the following steps are recommended for to-can assembly: a. ensure good humidity control in the environment (to help minimize esd). b. consider using additional ionization of the air (also helps minimize esd). c. it is best to ensure that the body of the to-can header or the ground lead of the header is grounded through the wire-bonding fixture. the best solution will ensure that the v cc lead of the to-can is also grounded. when this is do ne and the proced ure below is followed, the ph otodiode will help reduce the impact to pina of any positive charge on the wire bonder when bonding to pina, which is the very last bond placed. (because the pd is already bonded to pink and pink has an internal esd diode between itself and v cc , if v cc is grounded, this will help protect pina.) d. the most reliable protection to prevent esd damage on the die is to assure that the wirebond (including the spool, clamp, etc.) is properly grounded. 1. wire bond the ground pad(s) of the die first. 2. then wire bond the vcc pad to the to-can lead. 3. then wire bond any other pads going to the to-can leads (such as dout, dout and possibly mon) 4. next wire bond any capacitors inside the to-can. 5. inside the to-can, wire bond pink. 6. the final step is to wire bond pina.
applications information 02013-DSH-001-G mindspeed technologies ? 15 mindspeed proprietary and confidential 4.6 tia use with externally biased detectors in some applications, mindspeed tias are used with detectors biased at a voltage greater than available from tia pin cathode supply. this works well if some basic cautions are observed. when turned off, the input to the tia exhibits the following i/v characteristic: in the positive direction the impedance of the input is relatively high. figure 4-4. tia use with externally biased detectors, powered off pina unbiased -300 -250 -200 -150 -100 -50 0 50 100 -800 -600 -400 -200 0 200 400 600 800 1000 1200 mv a
applications information 02013-DSH-001-G mindspeed technologies ? 16 mindspeed proprietary and confidential after the tia is turned on, the dc servo and agc circuits attempt to null any input currents (up to the absolute maximum stated in ta bl e 1 - 1 ) as shown by the i/v curve in figure 4-5 . it can be seen that any negative voltage below 200 mv is nulled and that any positive going voltage above the pina standing voltage is nulled by the dc servo. the dc servo upper bandwidth varies from part to part, but is generally at least 30 khz. when externally biasing a detector such as an apd where the supply voltage of the apd exceeds that for pina ta bl e 1 - 1 , care should be taken to power up the tia first and to keep the tia powered up until after the power supply voltage of the apd is removed. failure to do this with the tia unpowered may result in damage to the input fet gate at pina. in some cases the damage may be very subtle, in that nearly normal operation may be experienced with the damage causing slight reductions in bandwidth and corresponding reductions in input sensitivity. figure 4-5. tia use with externally biased detectors, powered on pina biased -1000 -800 -600 -400 -200 0 200 400 600 800 1000 -300 -200 -100 0 100 200 300 400 500 600 700 mv a
02013-DSH-001-G mindspeed technologies ? 17 mindspeed proprietary and confidential 5.0 die specification figure 5-1. bare die information notes: process technology: cm os, silicon nitride passivation die thickness: 300 m pad metallization: aluminium die size: 1090 m x 880 m pad opening (except pina): 86 m across flat sides pina pad: 70 m across flat sides (70 m x 70 m) pad centers in m referenced to center of device connect backside bias to ground pad number pad x y 1 agc -329 -76 2 (1) v cc -329 -228 3 pink -124 -434 4 pina 124 -434 5 (1) v cc 329 -228 6 mon 329 -76 7dout 329 76 8 (1) dout gnd 329 228 9c (1, 2) gnd 329 360 9b (1, 2) gnd 255 434 9a (1, 2) gnd 124 434 10a (1, 2) gnd -124 434 10b (1, 2) gnd -255 434 10c (1, 2) gnd -329 360 11 (1) doutgnd -329 228 12 dout -329 76 notes: 1. it is only necessary to bond one v cc pad and one gnd pad. however, bondin g one of each pad (if available) on each side of the die is encouraged for improved performance in noisy environments. 2. each location is an ac ceptable bonding location. mon pina pink v cc agc dout gnd gnd doutgnd 1 2 3 4 56 7 8 9b 10b 11 12 v cc dout doutgnd 9a 9c 10a 10a
www.mindspeed.com general information: telephone: (949) 579-3000 headquarters - newport beach 4000 macarthur blvd., east tower newport beach, ca 92660 ? 2007 mindspeed technologies ? , inc. all rights reserved. information in this document is provided in connection with mindspeed technologies ? ("mindspeed ? ") products. these materials are provided by mindspeed as a service to its customers and may be used for informational purposes only. except as provided in mindspeed?s terms and conditions of sale for such products or in any separate agreement related to this document, mindspeed assumes no liability whatsoever. mindspeed assumes no responsibility for errors or omission s in these materials. mindspeed may make changes to specifications and product descriptions at any time, without notice. mindspeed makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incom patibilities arising from future changes to its specifications and product descriptions. no license, ex press or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. these materials are provided "as is" withou t warranty of any kind, either express or implied, relating to sale and/or use of mindspeed products including liability or warranties relating to fitness for a particular purpose, consequential or incidental damages, merchantability, or infringement of any patent, copyright or other intellectual property right. mindspeed further does not warrant the accuracy or completeness of the information, text, graph ics or other items contained within these materials. mindspeed shall not be liable fo r any special, indirect, incidental, or consequential damages, including without li mitation, lost revenues or lost profits, which may result from the use of these materials. mindspeed products are not intended for use in medical, lifesaving or life sustaining applications. mindspeed customers using or selling mindspeed pr oducts for use in such applications do so at their own risk and agree to fully indemnify mindspeed for any damages resulting from such improper use or sale. 02013-DSH-001-G mindspeed technologies ? 18 mindspeed proprietary and confidential

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